This invention relates to testing of semiconductor devices or semiconductor integrated circuits and more particularly to an apparatus and method for testing semiconductor integrated circuits which is capable of effectively testing the characteristic thereof even when the testing object has a level difference and an obstacle.
The previously known testing method for semiconductor integrated circuit was as follows. As shown in FIG. 8a and FIG. 8b, electrodes 3 are formed on the peripheral portion of each of semiconductor device chips included in a wafer 1 using a vapor deposition, sputtering or plating technique. These electrodes are used for testing of the semiconductor device chip. More specifically, as shown in FIGS. 2 and 3, probes 5 (e.g. tungsten needle) which protrude in the slanted downward direction from a probe card 4 so as to oppose to each other are brought into contact with the electrodes 3 so that their tip rubs the electrodes due to the bending of the probes 5, thereby testing the electric characteristic of the semiconductor devices.
However, in the prior art mentioned above, each probe 5 is as long as several tens of mm's so that the convergence inductance is large, which provides a limitation to the testing using high speed signals.
More specifically, assuming that the characteristic impedance of a signal line on the probe card 4 is R and the convergence inductance is L, the time constant is L/R. Now, if R=50 .OMEGA., and L=50 nH, the time constant=1 nS. When the high speed signal having such a small time constant is handled, a square signal waveform is distorted, thus making it impossible to carry out the testing with high accuracy. Therefore, only the D.C. characteristic testing is commonly carried out. Further, the above method of using the probes provides a certain limitation to the spacial arrangement of the probes, which make it impossible to aptly realize the high density of electrodes of the semiconductor device and the increase of the total number thereof.
In order to overcome such a difficulty, the following method has been proposed. As shown in FIG. 4, soldering balls 6 for solder melting connection are provided on the electrodes (not shown) of the semiconductor device chip 2. This chip 2 is connected with a wiring substrate 7, as shown in FIG. 5, (e.g. ceramic multi-layer substrate) by soldering the soldering balls 6 to electrodes 8 provided on the surface of the wiring substrate 7. This method is suitable to high density packaging or lump connection which provides a high yield rate. Thus, this method has been widely used.
With the development of the high density of the semiconductor device, the testing thereof using the high speed signals has been required. A method for testing, using such high speed signals, the characteristic of a semiconductor device in which soldering balls for soldering connection are provided on the electrodes thereof is disclosed in, for example, JP-A-No. 58-73129. This method is as follows. As shown in FIG. 7, a probe card 11 is a multi-layer substrate with lines having a certain characteristic impedance which are formed using, as reference layers, a signal conductor wiring 9 and a power source conductor layer 10. The probe card 11 is also provided, on its surface, with protrusion electrodes 12 of nickel plated tungsten at the positions corresponding to the electrodes of the semiconductor device 2. In testing, the probe card 11 is heated by a heat source 13, as shown in FIG. 6, which is provided on the surface of the card opposite to that on which the protrusion electrodes 12 are provided, and the protrusion electrodes 12 are held to the soldering balls 6. A connection is made between the protrusion electrode 12 and the soldering balls 6 through a solder welding technique. Then, signal communication is carried out therebetween to test the semiconductor device. After the testing has been completed, the probe card 11 is heated again to melt the solder, and separate the protrusion electrode 12 from the soldering balls.
This method permits the high speed electrical characteristic of the semiconductor device to be tested, but provides heat stress to the semiconductor device since the soldering balls on the electrodes thereof must be melted, and also requires a long time due to poor workability of testing. Further, this method can not be employed if there are some obstacles (e.g. servicing wirings) against the probing in a cooling fin for preventing the self-heating of the semiconductor device or an electrode pad of the substrate on which the semiconductor device is provided or there is a level difference on the surface with which the probe electrodes are brought into contact.
Thus, in order to effectively test the semiconductor device, there is needed a method and apparatus for testing the high speed electric characteristics of the semiconductor device which can test them for a short time without providing heat stress to the semiconductor device and can deal with a great number of electrodes arranged with high density, electrodes having level differences or a complicated spacial arrangement thereof.